From 638eee0d685c06d258cb55287204ca97bca7c344 Mon Sep 17 00:00:00 2001
From: jesopo
Date: Tue, 10 Dec 2019 05:27:35 +0000
Subject: move core modules to src/core_modules, make them uneffected by
 white/black list

---
 src/core_modules/commands/outs.py | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 src/core_modules/commands/outs.py

(limited to 'src/core_modules/commands/outs.py')

diff --git a/src/core_modules/commands/outs.py b/src/core_modules/commands/outs.py
new file mode 100644
index 00000000..e82ceefd
--- /dev/null
+++ b/src/core_modules/commands/outs.py
@@ -0,0 +1,28 @@
+import re
+from src import IRCLine, utils
+
+class StdOut(object):
+    def __init__(self, prefix):
+        self.prefix = prefix
+        self._lines = []
+        self._assured = False
+
+    def assure(self):
+        self._assured = True
+
+    def write(self, text):
+        self.write_lines(
+            text.replace("\r", "").replace("\n\n", "\n").split("\n"))
+    def write_lines(self, lines):
+        self._lines += list(filter(None, lines))
+
+    def get_all(self):
+        return self._lines.copy()
+    def pop(self):
+        return self._lines.pop(0)
+    def insert(self, text):
+        self._lines.insert(0, text)
+
+    def has_text(self):
+        return bool(self._lines)
+
-- 
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